The HT1200M is a pin-compatible drop-in for the SYM20C15 and A5191HRT HART modem ASICs, and like its predecessors it needs a 460.8 kHz time base to operate. In a real instrument design, that clock can come from three different sources, each with different trade-offs in BOM cost, board area, and clock-tree flexibility. This article walks through the three approaches and shows the STM32CubeMX configuration for an STM32L010RBT6 host MCU.
Method 1: External 460.8 kHz Passive Crystal
The classic approach: a 460.8 kHz crystal or ceramic resonator sits directly across the HT1200M’s oscillator pins — OXTL and IXTL, pins 17 and 18 respectively. No software configuration is needed; the modem starts oscillating as soon as power is applied. This is the method that has been used most often over the years and matches the HT1200M reference circuit one-for-one.
The trade-off is on the sourcing side. 460.8 kHz is a specialty crystal frequency, more expensive and harder to obtain than mainstream 32.768 kHz or MHz-range parts. The design also dedicates two passive components and a small area of board space to the modem clock alone.
Method 2: MCU MCO Pin
If the host MCU already has a stable clock running, that clock can be routed out through the Microcontroller Clock Output (MCO) pin and used to drive the HT1200M directly — eliminating the dedicated 460.8 kHz crystal entirely.
Wiring:
- HT1200M pin 17 (OXTL) → MCU MCO output pin (labelled ACLK in this example)
- HT1200M pin 18 (IXTL) → MCU GND
STM32CubeMX configuration for the STM32L010RBT6:
- Open STM32CubeMX and select the STM32L010RBT6 part.
- Under System Core → RCC, open the RCC Mode and Configuration pane. Set High Speed Clock (HSE) to Crystal/Ceramic Resonator and enable Master Clock Output 1.
- The MCO pin will then drive the ACLK net at the configured frequency.
This method removes the modem-specific crystal from the BOM. The trade-off is that the output frequency on the MCO pin depends on the host MCU’s clock tree — if the host runs on a frequency that doesn’t divide cleanly down to 460.8 kHz, this approach won’t hit the target without additional clock-chain work.
Method 3: MCU Timer PWM Output
The most flexible option. Any general-purpose timer with PWM capability can be configured to generate the 460.8 kHz clock, regardless of what main frequency the host MCU happens to run on.
The example below uses the STM32L010RBT6 driven by a 3.6864 MHz external crystal, with the PWM output on PA0.
Wiring:
- HT1200M pin 17 (OXTL) → MCU PA0 (labelled ACLK)
- HT1200M pin 18 (IXTL) → MCU GND
STM32CubeMX configuration:
- Select the STM32L010RBT6 part.
- In Clock Configuration, set the input frequency to 3.6864 MHz and set System Clock Mux to HSE.
- Under System Core → SYS, enable Serial Wire Debug.
- Under Timers → TIM2, set Clock Source to Internal Clock and Channel 1 to PWM Generation CH1.
- Under TIM2 → Configuration → Parameter Settings → Counter Settings, configure the Prescaler (PSC, 16-bit) and Counter Period / Auto-Reload Register (ARR, 16-bit) to bring the timer output down to 460.8 kHz. The PWM output frequency is:
With a 3.6864 MHz timer input, the total divider ratio needs to equal 8 — for example, PSC + 1 and ARR + 1 chosen so their product is 8.
The PWM method works with whatever main clock the host MCU happens to use, and the divider can be re-tuned later if anything in the system clock chain changes. The trade-off is one timer channel committed for the life of the device and slightly more software setup than the MCO method.
Which Method to Choose
The external crystal and the MCO methods are the two most commonly chosen. The external crystal is the right call when the design needs to follow the HT1200M reference circuit exactly with no MCU-side dependencies. The MCO method is preferred when the host MCU’s clock tree already divides cleanly down to 460.8 kHz — it removes the specialty crystal from the BOM with no extra software overhead.
Timer PWM becomes the right choice when neither of the above fits — typically on low-cost designs where a single mainstream crystal (3.6864 MHz, 7.3728 MHz, or similar) drives the whole MCU and there is no clean integer divide-down path to 460.8 kHz through standard clock-tree dividers.

















